42 #ifndef QATOMIC_MIPS_H 43 #define QATOMIC_MIPS_H 49 #define Q_ATOMIC_INT_REFERENCE_COUNTING_IS_ALWAYS_NATIVE 56 #define Q_ATOMIC_INT_TEST_AND_SET_IS_ALWAYS_NATIVE 63 #define Q_ATOMIC_INT_FETCH_AND_STORE_IS_ALWAYS_NATIVE 70 #define Q_ATOMIC_INT_FETCH_AND_ADD_IS_ALWAYS_NATIVE 77 #define Q_ATOMIC_POINTER_TEST_AND_SET_IS_ALWAYS_NATIVE 86 #define Q_ATOMIC_POINTER_FETCH_AND_STORE_IS_ALWAYS_NATIVE 95 #define Q_ATOMIC_POINTER_FETCH_AND_ADD_IS_ALWAYS_NATIVE 100 template <
typename T>
104 #if defined(Q_CC_GNU) && !defined(Q_OS_IRIX) 106 #if _MIPS_SIM == _ABIO32 107 #define SET_MIPS2 ".set mips2\n\t" 114 register int originalValue;
115 register int newValue;
116 asm volatile(
".set push\n" 119 "ll %[originalValue], %[_q_value]\n" 120 "addiu %[newValue], %[originalValue], %[one]\n" 121 "sc %[newValue], %[_q_value]\n" 122 "beqz %[newValue], 0b\n" 125 : [originalValue]
"=&r" (originalValue),
127 [newValue]
"=&r" (newValue)
130 return originalValue != -1;
135 register int originalValue;
136 register int newValue;
137 asm volatile(
".set push\n" 140 "ll %[originalValue], %[_q_value]\n" 141 "addiu %[newValue], %[originalValue], %[minusOne]\n" 142 "sc %[newValue], %[_q_value]\n" 143 "beqz %[newValue], 0b\n" 146 : [originalValue]
"=&r" (originalValue),
148 [newValue]
"=&r" (newValue)
149 : [minusOne]
"i" (-1)
151 return originalValue != 1;
157 register int tempValue;
158 asm volatile(
".set push\n" 161 "ll %[result], %[_q_value]\n" 162 "xor %[result], %[result], %[expectedValue]\n" 163 "bnez %[result], 0f\n" 165 "move %[tempValue], %[newValue]\n" 166 "sc %[tempValue], %[_q_value]\n" 167 "beqz %[tempValue], 0b\n" 171 : [result]
"=&r" (result),
172 [tempValue]
"=&r" (tempValue),
174 : [expectedValue]
"r" (expectedValue),
175 [newValue]
"r" (newValue)
183 register int tempValue;
184 asm volatile(
".set push\n" 187 "ll %[result], %[_q_value]\n" 188 "xor %[result], %[result], %[expectedValue]\n" 189 "bnez %[result], 0f\n" 191 "move %[tempValue], %[newValue]\n" 192 "sc %[tempValue], %[_q_value]\n" 193 "beqz %[tempValue], 0b\n" 198 : [result]
"=&r" (result),
199 [tempValue]
"=&r" (tempValue),
201 : [expectedValue]
"r" (expectedValue),
202 [newValue]
"r" (newValue)
210 register int tempValue;
211 asm volatile(
".set push\n" 215 "ll %[result], %[_q_value]\n" 216 "xor %[result], %[result], %[expectedValue]\n" 217 "bnez %[result], 0f\n" 219 "move %[tempValue], %[newValue]\n" 220 "sc %[tempValue], %[_q_value]\n" 221 "beqz %[tempValue], 0b\n" 225 : [result]
"=&r" (result),
226 [tempValue]
"=&r" (tempValue),
228 : [expectedValue]
"r" (expectedValue),
229 [newValue]
"r" (newValue)
241 register int originalValue;
242 register int tempValue;
243 asm volatile(
".set push\n" 246 "ll %[originalValue], %[_q_value]\n" 247 "move %[tempValue], %[newValue]\n" 248 "sc %[tempValue], %[_q_value]\n" 249 "beqz %[tempValue], 0b\n" 252 : [originalValue]
"=&r" (originalValue),
253 [tempValue]
"=&r" (tempValue),
255 : [newValue]
"r" (newValue)
257 return originalValue;
262 register int originalValue;
263 register int tempValue;
264 asm volatile(
".set push\n" 267 "ll %[originalValue], %[_q_value]\n" 268 "move %[tempValue], %[newValue]\n" 269 "sc %[tempValue], %[_q_value]\n" 270 "beqz %[tempValue], 0b\n" 274 : [originalValue]
"=&r" (originalValue),
275 [tempValue]
"=&r" (tempValue),
277 : [newValue]
"r" (newValue)
279 return originalValue;
284 register int originalValue;
285 register int tempValue;
286 asm volatile(
".set push\n" 290 "ll %[originalValue], %[_q_value]\n" 291 "move %[tempValue], %[newValue]\n" 292 "sc %[tempValue], %[_q_value]\n" 293 "beqz %[tempValue], 0b\n" 296 : [originalValue]
"=&r" (originalValue),
297 [tempValue]
"=&r" (tempValue),
299 : [newValue]
"r" (newValue)
301 return originalValue;
311 register int originalValue;
312 register int newValue;
313 asm volatile(
".set push\n" 316 "ll %[originalValue], %[_q_value]\n" 317 "addu %[newValue], %[originalValue], %[valueToAdd]\n" 318 "sc %[newValue], %[_q_value]\n" 319 "beqz %[newValue], 0b\n" 322 : [originalValue]
"=&r" (originalValue),
324 [newValue]
"=&r" (newValue)
325 : [valueToAdd]
"r" (valueToAdd)
327 return originalValue;
332 register int originalValue;
333 register int newValue;
334 asm volatile(
".set push\n" 337 "ll %[originalValue], %[_q_value]\n" 338 "addu %[newValue], %[originalValue], %[valueToAdd]\n" 339 "sc %[newValue], %[_q_value]\n" 340 "beqz %[newValue], 0b\n" 344 : [originalValue]
"=&r" (originalValue),
346 [newValue]
"=&r" (newValue)
347 : [valueToAdd]
"r" (valueToAdd)
349 return originalValue;
354 register int originalValue;
355 register int newValue;
356 asm volatile(
".set push\n" 360 "ll %[originalValue], %[_q_value]\n" 361 "addu %[newValue], %[originalValue], %[valueToAdd]\n" 362 "sc %[newValue], %[_q_value]\n" 363 "beqz %[newValue], 0b\n" 366 : [originalValue]
"=&r" (originalValue),
368 [newValue]
"=&r" (newValue)
369 : [valueToAdd]
"r" (valueToAdd)
371 return originalValue;
379 #if defined(__LP64__) 387 template <
typename T>
391 register T *tempValue;
392 asm volatile(
".set push\n" 395 LLP
" %[result], %[_q_value]\n" 396 "xor %[result], %[result], %[expectedValue]\n" 397 "bnez %[result], 0f\n" 399 "move %[tempValue], %[newValue]\n" 400 SCP
" %[tempValue], %[_q_value]\n" 401 "beqz %[tempValue], 0b\n" 405 : [result]
"=&r" (result),
406 [tempValue]
"=&r" (tempValue),
408 : [expectedValue]
"r" (expectedValue),
409 [newValue]
"r" (newValue)
414 template <
typename T>
418 register T *tempValue;
419 asm volatile(
".set push\n" 422 LLP
" %[result], %[_q_value]\n" 423 "xor %[result], %[result], %[expectedValue]\n" 424 "bnez %[result], 0f\n" 426 "move %[tempValue], %[newValue]\n" 427 SCP
" %[tempValue], %[_q_value]\n" 428 "beqz %[tempValue], 0b\n" 433 : [result]
"=&r" (result),
434 [tempValue]
"=&r" (tempValue),
436 : [expectedValue]
"r" (expectedValue),
437 [newValue]
"r" (newValue)
442 template <
typename T>
446 register T *tempValue;
447 asm volatile(
".set push\n" 451 LLP
" %[result], %[_q_value]\n" 452 "xor %[result], %[result], %[expectedValue]\n" 453 "bnez %[result], 0f\n" 455 "move %[tempValue], %[newValue]\n" 456 SCP
" %[tempValue], %[_q_value]\n" 457 "beqz %[tempValue], 0b\n" 461 : [result]
"=&r" (result),
462 [tempValue]
"=&r" (tempValue),
464 : [expectedValue]
"r" (expectedValue),
465 [newValue]
"r" (newValue)
470 template <
typename T>
476 template <
typename T>
479 register T *originalValue;
480 register T *tempValue;
481 asm volatile(
".set push\n" 484 LLP
" %[originalValue], %[_q_value]\n" 485 "move %[tempValue], %[newValue]\n" 486 SCP
" %[tempValue], %[_q_value]\n" 487 "beqz %[tempValue], 0b\n" 490 : [originalValue]
"=&r" (originalValue),
491 [tempValue]
"=&r" (tempValue),
493 : [newValue]
"r" (newValue)
495 return originalValue;
498 template <
typename T>
501 register T *originalValue;
502 register T *tempValue;
503 asm volatile(
".set push\n" 506 LLP
" %[originalValue], %[_q_value]\n" 507 "move %[tempValue], %[newValue]\n" 508 SCP
" %[tempValue], %[_q_value]\n" 509 "beqz %[tempValue], 0b\n" 513 : [originalValue]
"=&r" (originalValue),
514 [tempValue]
"=&r" (tempValue),
516 : [newValue]
"r" (newValue)
518 return originalValue;
521 template <
typename T>
524 register T *originalValue;
525 register T *tempValue;
526 asm volatile(
".set push\n" 530 LLP
" %[originalValue], %[_q_value]\n" 531 "move %[tempValue], %[newValue]\n" 532 SCP
" %[tempValue], %[_q_value]\n" 533 "beqz %[tempValue], 0b\n" 536 : [originalValue]
"=&r" (originalValue),
537 [tempValue]
"=&r" (tempValue),
539 : [newValue]
"r" (newValue)
541 return originalValue;
544 template <
typename T>
550 template <
typename T>
553 register T *originalValue;
554 register T *newValue;
555 asm volatile(
".set push\n" 558 LLP
" %[originalValue], %[_q_value]\n" 559 "addu %[newValue], %[originalValue], %[valueToAdd]\n" 560 SCP
" %[newValue], %[_q_value]\n" 561 "beqz %[newValue], 0b\n" 564 : [originalValue]
"=&r" (originalValue),
566 [newValue]
"=&r" (newValue)
567 : [valueToAdd]
"r" (valueToAdd *
sizeof(T))
569 return originalValue;
572 template <
typename T>
575 register T *originalValue;
576 register T *newValue;
577 asm volatile(
".set push\n" 580 LLP
" %[originalValue], %[_q_value]\n" 581 "addu %[newValue], %[originalValue], %[valueToAdd]\n" 582 SCP
" %[newValue], %[_q_value]\n" 583 "beqz %[newValue], 0b\n" 587 : [originalValue]
"=&r" (originalValue),
589 [newValue]
"=&r" (newValue)
590 : [valueToAdd]
"r" (valueToAdd *
sizeof(T))
592 return originalValue;
595 template <
typename T>
598 register T *originalValue;
599 register T *newValue;
600 asm volatile(
".set push\n" 604 LLP
" %[originalValue], %[_q_value]\n" 605 "addu %[newValue], %[originalValue], %[valueToAdd]\n" 606 SCP
" %[newValue], %[_q_value]\n" 607 "beqz %[newValue], 0b\n" 610 : [originalValue]
"=&r" (originalValue),
612 [newValue]
"=&r" (newValue)
613 : [valueToAdd]
"r" (valueToAdd *
sizeof(T))
615 return originalValue;
618 template <
typename T>
637 register int expected;
643 return expected != -1;
648 register int expected;
654 return expected != 1;
765 template <
typename T>
771 template <
typename T>
777 template <
typename T>
783 template <
typename T>
789 template <
typename T>
801 template <
typename T>
813 template <
typename T>
825 template <
typename T>
837 template <
typename T>
849 template <
typename T>
862 template <
typename T>
874 template <
typename T>
892 #endif // QATOMIC_MIPS_H static bool isFetchAndStoreNative()
static bool isTestAndSetNative()
int fetchAndStoreRelease(int newValue)
static bool isReferenceCountingNative()
T * fetchAndAddRelaxed(qptrdiff valueToAdd)
#define QT_END_NAMESPACE
This macro expands to.
static bool isFetchAndAddNative()
static bool isTestAndSetNative()
static bool isFetchAndAddNative()
Q_CORE_EXPORT int q_atomic_test_and_set_acquire_ptr(volatile void *ptr, void *expected, void *newval)
T * fetchAndStoreRelease(T *newValue)
static bool isTestAndSetWaitFree()
T * fetchAndAddRelease(qptrdiff valueToAdd)
bool testAndSetOrdered(T *expectedValue, T *newValue)
int fetchAndAddAcquire(int valueToAdd)
T * fetchAndAddAcquire(qptrdiff valueToAdd)
int fetchAndStoreRelaxed(int newValue)
T * fetchAndAddOrdered(qptrdiff valueToAdd)
bool testAndSetAcquire(int expectedValue, int newValue)
Q_CORE_EXPORT int q_atomic_test_and_set_ptr(volatile void *ptr, void *expected, void *newval)
bool testAndSetRelaxed(int expectedValue, int newValue)
#define QT_BEGIN_NAMESPACE
This macro expands to.
int fetchAndStoreAcquire(int newValue)
QIntegerForSizeof< void * >::Signed qptrdiff
T * fetchAndStoreOrdered(T *newValue)
#define Q_INLINE_TEMPLATE
int fetchAndAddRelease(int valueToAdd)
const T * ptr(const T &t)
bool testAndSetOrdered(int expectedValue, int newValue)
T * fetchAndStoreAcquire(T *newValue)
static bool isFetchAndStoreWaitFree()
Q_CORE_EXPORT int q_atomic_test_and_set_release_int(volatile int *ptr, int expected, int newval)
static bool isTestAndSetWaitFree()
static bool isReferenceCountingWaitFree()
int fetchAndAddOrdered(int valueToAdd)
static bool isFetchAndStoreWaitFree()
static bool isFetchAndAddWaitFree()
static bool isFetchAndAddWaitFree()
bool testAndSetRelease(int expectedValue, int newValue)
Q_CORE_EXPORT int q_atomic_test_and_set_acquire_int(volatile int *ptr, int expected, int newval)
int fetchAndAddRelaxed(int valueToAdd)
int fetchAndStoreOrdered(int newValue)
bool testAndSetRelaxed(T *expectedValue, T *newValue)
Q_CORE_EXPORT int q_atomic_test_and_set_release_ptr(volatile void *ptr, void *expected, void *newval)
bool testAndSetRelease(T *expectedValue, T *newValue)
T * fetchAndStoreRelaxed(T *newValue)
Q_CORE_EXPORT int q_atomic_test_and_set_int(volatile int *ptr, int expected, int newval)
static bool isFetchAndStoreNative()
bool testAndSetAcquire(T *expectedValue, T *newValue)